- Synthesis of Concurrent Database Transaction Implementations
- Approximate Relation Decomposition
Scalable Ordered Stream Processing
The CScale project at MSR India explores new designs of distributed stream processing engines. As part of this project, we are working on efficient scheduling frameworks for shared-memory multicore systems. We have conducted detailed empirical study on some important design decisions pertaining to multicore scheduling of stream queries. We are currently working on a multicore scheduler that exploits a combination of static and dynamic design techniques and ensures greater utilization of the multiple cores.
I/O Optimal Index Structures
Indexing techniques optimized for a higher write throughput such as LSM Trees generally compromise on read performance. We are working on designing and implementing an indexing technique optimized for both read and write latencies. As part of the project we have both experimentally and analytically verified the validity of some well known ideas in designing key value stores.
Automated Linguistic Personalization
We designed and developed a novel method of personalizing ad messages based on the linguistic style of a target segment using user generated textual content on social media. We modified a template advertisement by inserting modifiers (adjectives, adverbs) at appropriate positions which evoked postive sentiment among users from different segments. We also conducted a crowdsourced study on the indistinguishability of the improved advertisement from other human generated ad messages.
Synthesis Modulo Bisimulation
We worked on the open problem of synthesizing distributed implementation from global specifications in the framework of transition systems, using bismulation as the equivalence criterion. We focussed on the loosely cooperating model of distributed transition systems. We identified several interesting properties about synthesizable specification out of which the major one was diamond closure property in the bisimulation quotient of a synthesizable system. We also showed that the bisimulation quotient need not necessarily be a product.